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ERSA'09: July 14, 2009 Schedule

Last modified 2009-06-20 14:06

To select a different schedule CLICK HERE


6:45am - 5:00pm:  REGISTRATION (Second Floor, Conference Lobby: 1-5)


08:00 - 08:20am:  FREE SLOT


SESSION G-ERSA:   APPLICATIONS OF RECONFIGURABLE SYSTEMS
                  Chair: Dr. Gianluca Tempesti, University of York, UK
                  July 14, 2009 (Tuesday);  08:20am - 10:40pm
                  (LOCATION: Gold Room)

08:20 - 08:40am:  The Speedy DDR2 Controller For FPGAs
                  Ray Bittner
                  Microsoft Research, USA

08:40 - 09:00am:  An Implementation of Security Extensions for Data Integrity and
                  Confidentiality in Soft-Core Processors
                  Austin Rogers and Aleksandar Milenkovic
                  The University of Alabama in Huntsville, USA

09:00 - 09:20am:  A Scalable H.264/AVC Variable Block Size Motion Estimation Engine
                  Using Partial Reconfiguration
                  Sumedha Gupta K, Jooheung Lee
                  University of Central Florida, USA

09:20 - 09:40am:  High Efficiency Reconfigurable Cache for Image Processing
                  Zahir Larabi, Yves Mathieu, Stephane Mancini
                  TELECOM ParisTech, France & GIPSA-Lab, France

09:40 - 10:00am:  An Efficient Comparative Evaluation to Buffering Methods for
                  Window-Based Image Processing Using Semi-Programmable Hardware
                  Akira Yamawaki and Masahiko Iwane
                  Kyushu Institute of Technology, Japan

10:00 - 10:20am:  Implementation of the Gauss-Newton Algorithm for Non-Linear
                  Least-Mean-Squares Fitting in FPGA Devices
                  Andrea Abba, Antonio Manenti, Andrea Suardi, Angelo Geraci, Giancarlo Ripamonti
                  Politecnico of Milan, Italy

10:20 - 10:40am:  High-Efficiency FPGA Fully-Based Implementation of the Conjugate Gradient Method
                  Andrea Suardi, Antonio Manenti, Andrea Abba, Angelo Geraci
                  Politecnico of Milan, Italy

10:40 - 11:00am:  BREAK


SESSION E-ERSA:   MULTI-CONTEXT DEVICES AND APPLICATIONS
                  Chair: Dr. Minoru Watanabe, Shizuoka University, Japan
                  July 14, 2009 (Tuesday);  11:00am - 12:00p
                  (LOCATION: Gold Room)

11:00 - 11:20am:  An Asynchronous Field-Programmable VLSI Using LEDR/4-Phase-Dual-Rail
                  Protocol Converters
                  Shota Ishihara, Yoshiya Komatsu, Masanori Hariyama, Michitaka Kameyama
                  Tohoku University, Japan

11:20 - 11:40am:  A Systolic String Matching Algorithm for High-Speed Recognition of
                  a Restricted Regular Set
                  Yosuke Kawanaka, Shin'ichi Wakabayashi, Shinobu Nagayama
                  Hiroshima City University, Japan

11:40 - 12:00pm:  A Novel Multicontext Coarse-Grained Join Accelerator For Column-Oriented
                  Databases
                  Pranav Vaidya and Jaehwan John Lee
                  Indiana University-Purdue University Indianapolis, USA

12:00 - 01:00pm:  LUNCH (On Your Own)


SESSION F-ERSA:   RECONFIGURABLE SYSTEM DESIGN TOOLS AND LANGUAGES
                  Chair: Dr. Maya Gokhale, Lawrence Livermore National Laboratory, USA
                  July 14, 2009 (Tuesday);  01:00pm - 02:40pm
                  (LOCATION: Gold Room)

01:00 - 01:20pm:  Towards Effective Modeling and Programming Multi-Core Tiled
                  Reconfigurable Architectures
                  K. C. Rovers, Marcel D. van de Burgwal, Jan Kuper, Gerard Smit
                  University of Twente, The Netherlands

01:20 - 01:40pm:  SiLLis: A Simplified Language for Monitoring and Debugging of
                  Reconfigurable Systems
                  Paolo Roberto Grassi, Marco Domenico Santambrogio, Jens Hagemeyer,
                  Christopher Pohl, Mario Porrmann
                  Politecnico di Milano, Italy & University of Paderborn, Germany

01:40 - 02:00pm:  Supporting Operating Systems For Reconfigurable Computing: A Distributed
                  Service Oriented Approach
                  Fernando Rincon, Jesus Barba, Francisco Moya, Juan Carlos Lopez, Julio Dondo
                  University of Castilla-La Mancha, Spain & National University of San Luis, Spain

02:00 - 02:20pm:  Harnessing Human Computation Cycles for the FPGA Placement Problem
                  L. Terry, V. Roitch, S. Tufail, K. Singh, O. Taraq, W. Luk, and P. Jamieson
                  Imperial College, UK

02:20 - 02:40pm:  Programming Model and Low-level Language for a Coarse-Grained
                  Reconfigurable Multimedia Processor
                  Wim Vanderbauwhede, Martin Margala, Sai Rahul Chalamalaseti, Sohan Purohit
                  University of Glasgow, UK & University of Massachusetts at Lowell, USA


SESSION C-ERSA:   INVITED PANEL SESSION; ADAPTIVE / EVOLVABLE RECONFIGURABLE COMPUTING SYSTEMS
                  Chair: Dr. Gilles Sassatelli, University of Monptellier 2, France
                  July 14, 2009 (Tuesday);  02:40pm - 04:40pm
                  (LOCATION: Gold Room)

02:40 - 03:00pm:  BREAK

                  PANEL PRESENTATIONS:

03:00 - 03:20pm:  PANEL PAPER: Bio-Inspired Systems: Self-Adaptability From Chips
                  to Sensor-Network Architectures
                  Dr. Gilles Sassatelli
                  University of Montpellier 2, France

03:20 - 03:40pm:  Future Multi-Core System-on-Chip (MCSoC): Adaptive and Reliable
                  Computing in the Nano Era
                  Prof. Juergen Becker
                  Karlsruhe Institute of Technology - KIT, Germany

03:40 - 04:00pm:  A Design Environment for Bio-Inspired Cellular Architectures
                  Dr. Pierre-Andre Mudry, Dr. Gianluca Tempesti
                  EPFL, Switzerland & University of York, UK

04:00 - 04:20pm:  Networked Self-Adaptive Systems: An Opportunity for Configuring in the Large
                  Dr. Jean-Philippe Diguet
                  University of South Britanny, France

04:20 - 04:40pm:  Adaptive Processing Architectures for the Ultimate Scaling of the CMOS World
                  Prof. Luigi Carro and M. M. Pereira
                  Universidade Federal do Rio Grande do Sul (UFRGS), Brazil

04:40 - 05:00pm:  BREAK
 

SESSION C-ERSA:   INVITED PANEL SESSION; ADAPTIVE / EVOLVABLE RECONFIGURABLE COMPUTING SYSTEMS
                  Chair: Dr. Gilles Sassatelli, University of Monptellier 2, France
                  July 14, 2009 (Tuesday);  05:00pm - 06:00pm
                  (LOCATION: Gold Room)

                  PANEL DISCUSSION


SESSION C1-ERSA:  INDUSTRIAL DEMO
                  July 14, 2009 (Tuesday);  06:10pm - 07:10pm
                  (LOCATION: Gold Room)

06:10 - 07:10pm:  Element CXI: Milpitas, USA
                  Exploring Element Computing in Academia
                  Prof. Peter Athanas
                  Virginia Tech, USA

07:10 - 07:20pm:  Closing Remarks: Dr. Toomas P. Plaks, London, UK



SESSION I-ERSA:   POSTERS
                  July 14, 2009 (Tuesday);  07:30pm - 08:30pm
                  (LOCATION: Gold Room)

                  O. Nanocomputing Block (NAB) Based Multi-Context FPGA
                     Weisheng Zhao, Christian Gamrat, Yves Lhuillier
                     CEA LIST, France
                  O. Optimizing On-Chip Memory Systems for FPGAs
                     Craig Moore, Harald Devos, Dirk Stroobandt
                     Ghent University, Belgium
                  O. An FPGA Implementation of an Elliptic Curve Cryptosystem Coprocessor
                     over Prime Fields
                     Qian Ding and William H. Robinson
                     Vanderbilt University, Nashville, USA
                  O. A Multi-Context Programmable Optically Reconfigurable Gate Array
                     Shinya Kubota and Minoru Watanabe
                     Shizuoka University, Japan
                  O. Optically Reconfigurable Gate Array with a One-Time Writable Holographic Memory
                     Takayuk Mabuchi, Kenji Miyashiro, Minoru Watanabe, Akifumi Ogiwara
                     Shizuoka University, Japan
                  O. Alignment Compensation Method for an Optically Reconfigurable Gate Array
                     Hironobu Morita and Minoru Watanabe
                     Shizuoka University, Japan


To select a different schedule CLICK HERE


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San Diego, California, USA
Contact: Kaveh Arbtan

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